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Edgecortix

[India] Design Verification Engineer

Reposted 6 Days Ago
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In-Office
Knowledge Park, Gautam Buddha Nagar, Uttar Pradesh
Senior level
In-Office
Knowledge Park, Gautam Buddha Nagar, Uttar Pradesh
Senior level
The Design Verification Engineer will work on AI hardware verification, develop verification infrastructure, write testbenches and assertions, and perform code coverage analysis.
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About Edgecortix

At Edgecortix we are a deep-tech startup revolutionizing edge computing with artificial intelligence and novel high efficiency silicon on chip design. Originating from multiple years of research, our unique AI hardware & software co-design principle and the Dynamic Neural Accelerator ® AI processor IP are geared towards positively disrupting the rapidly growing artificial intelligence edge hardware space and bring the power of AI and machine learning to all kinds of devices. Our operations are headquartered in Tokyo, Japan, with offices in Singapore, Virginia, California in the US. In addition, we are starting a new Design Center in India, located in Hyderabad.


The Team

As an engineering driven company we are working to define and solve the hardest problems in AI including computer vision, speech, and natural language, geared towards real-time capabilities on small to medium form factor devices. We originated out of multiple years of research, as such at our core we value learning, intellectual curiosity, and self-starters. We have the ambitious goal of enabling cloud-level performance with significantly better energy-efficiency for AI inference at the edge.


Your Role and Responsibilities:

This role is part of the EdgeCortix Artificial Intelligence Hardware Team

  • Working closely with the design architecture team and contributing to IP, performance and SoC related verification.
  • Playing a key role in development of verification infrastructure, which would involve VIPs, different memory models, monitors, etc.
  • Writing configurable testbenches in SystemVerilog/UVM and testbench automation.
  • Writing System verilog assertions and maintaining them.
  • Writing functional coverage and overall functional and code coverage analysis.
  • Working on ASIC power estimation and power-aware verification.
  • Working on Gate Level Simulation and Emulators
  • Automating tool flows and creation of result reports.

Desired Qualifications:

  • 6-7 years of experience in functional verification of blocks/systems using SystemVerilog/UVM.
  • Strong understanding of verification techniques including assertions, metric-driven and coverage-driven verification.
  • Experience in developing full verification infrastructure from scratch.
  • Experience with verification of systems which involve high-speed buses such as AXI4.
  • Verification Experience on PCIe or DDR
  • Working knowledge of Emulator based verification.
  • Experience with gate level simulations and delay modeling.
  • Experience with constraint random verification.
  • Experience with writing functional coverage and overall code coverage analysis.
  • Experience with coverage-driven verification methodology.
  • Experience in writing and debugging System Verilog assertions.
  • Strong experience in debugging RTL and testbenches.

Preferred Qualification:

  • Prior experience in working with VIPs and verification environments which involve VIPs.
  • Prior experience in verifying IPs/systems which include PCI-E/DDR (any) protocol.
  • Experience with SoC level verification.
  • Experience in using Continuous Integration tools such as Jenkins, Gitlab CI, Circle CI.
  • Formal Verification techniques
  • Emulation based verification
  • Experience with scripting languages such as perl/python.

Looking for someone who is passionate to innovate and execute, a high-gear individual with multi-tasking capabilities, ready to solve challenging problems. Ideal candidate is a person who is personable, self-motivated and has excellent written and verbal communication skills.


What’s in it for you?

Make a difference: you will have the opportunity to join a well-funded fabless AI semiconductor startup that is disrupting the AI software and hardware co-design space. Be an integral part of its growth and momentum.


Location

Hyderabad is the primary work location, but Bangalore is also available.

And Hybrid Remote working is allowed.


Benefits and Perks

  • Highly competitive salary and stock options
  • Flex work time
  • Top-tier employee benefits

Top Skills

Asic
Circle Ci
Ddr
Emulators
Gate Level Simulation
Gitlab Ci
Jenkins
Pcie
Perl
Python
Systemverilog
Uvm

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